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| Propagation Delay | 2.23 ns |
|---|---|
| Surface Mount | YES |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Height Seated (Max) | 2.1mm |
| Terminal Position | BOTTOM |
| Package / Case | 672-BBGA, FCBGA |
| Technology | CMOS |
| JESD-30 Code | S-PBGA-B672 |
| Voltage - Supply | 1.425V~1.575V |
| Number of Inputs | 480 |
| Terminal Form | BALL |
| Number of Terminations | 672 |
| Supply Voltage | 1.5V |
| ECCN Code | 3A991 |
| Number of Logic Elements/Cells | 16640 |
| Width | 27mm |
| Qualification Status | Not Qualified |
| RoHS Status | RoHS Compliant |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Operating Temperature | 0°C~85°C TJ |
| HTS Code | 8542.39.00.01 |
| Total RAM Bits | 425984 |
| Number of LABs/CLBs | 1664 |
| Number of I/O | 492 |
| Mounting Type | Surface Mount |
| JESD-609 Code | e1 |
| Power Supplies | 1.51.5/3.3V |
| Number of Outputs | 480 |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Peak Reflow Temperature (Cel) | 245 |
| Series | APEX II |
| Programmable Logic Type | LOADABLE PLD |
| Length | 27mm |
| Subcategory | Field Programmable Gate Arrays |
| Packaging | Tray |
| Part Status | Obsolete |
| Number of Gates | 1900000 |
| Output Function | MACROCELL |
| Terminal Pitch | 1mm |
| Reach Compliance Code | compliant |
| Base Part Number | EP2A15 |
Intel
FPGA APEX II Family 600K Gates 16640 Cells 500MHz 0.15um (CMOS) Technology 1.5V 724-Pin FCBGA
Intel
FPGA APEX II Family 600K Gates 16640 Cells 379MHz 0.15um Technology 1.5V 672-Pin FC-FBGA
